성심산학협력단

지능 알고리즘 및 통계 분석을 기반으로 지능형 반도체 제조기술 및 BIT 융합 기술을 주로 연구하고 있다. 1998년 미국 Georgia Institute of Technology(Georgia Tech)에서 신경회로망 및 진화 알고리즘을 기반으로 MCM(multi-chip module) packaging 공정의 modeling, optimization, 및 control 연구로 박사 학위를 받았다. 학위 후 미국 PRC(packaging research center), Georgia Tech에서 research associate로 일했고, 그 후 삼성전자 반도체 System LSI사업부 SoC팀에서 책임연구원으로 일했다. 2001년부터 가톨릭대학교 정보통신전자공학부에서 지능시스템 연구실을 운영해 오고 있으며, 중기청, 산학협동재단, ETRI, 지경부, 과기부, (美) Micron社, 연구재단 등에서 관련 연구를 지원받아 진행했다.

His research focuses on intelligent semiconductor manufacturing technology and BIT convergence technology based on intelligent algorithms and statistical analysis. He received his Ph.D. degree from the Georgia Institute of Technology (Georgia Tech) in 1998 for modeling, optimization and control of multi-chip module (MCM) packaging process using neural networks and genetic algorithms. After completing his Ph.D., he worked as a research associate at the Packaging Research Center (PRC), Georgia Tech, and then as a principal researcher at the SoC team of the System LSI Division of Samsung Electronics. Since 2001, he has managed the Intelligent Systems Laboratory at the School of Information, Communications and Electronics Engineering, The Catholic University of Korea, and has received research support from the Small and Medium Business Administration, the Industry-Academia Cooperation Foundation, ETRI, the Ministry of Science and ICT, Micron Corporation, and the National Research Foundation.